{"introduction":"A recent Master's graduate from Imperial College London, with passion in web, FPGA, compiler and programming in general. Have worked as independent developer since high school and made popular and business-successful apps.","contacts":[{"name":"GitHub","link":"https://github.com/0x6770/"},{"name":"LinkedIn","link":"https://www.linkedin.com/in/0x6770"},{"name":"Email","link":"mailto:yujie@wang.icu"},{"name":"WeChat: hex6770","link":""}],"experience":[{"employer":"Jump Trading International Limited","role":"Hardware Engineer Intern","url":"https://jumptrading.com/","responsibilities":"Formal verification for hardware.","start":"2022-04-04","end":"2022-09-09"},{"employer":"Institute of Software, Chinese Academy of Science","role":"Software Engineer Intern","url":"https://plctlab.github.io/","responsibilities":"Port Google [V8](https://v8.dev/) engine for RISC-V and add WebAssembly SIMD support for it with RISC-V V vector extension. Our team managed to launch the first JIT-supported chromium browser on RISC-V.","start":"2021-09-01","end":"2021-12-01"},{"employer":"Qianxun Spatial Intel. Inc","role":"Software Engineer Intern","url":"https://qxwz.com/en/","responsibilities":"Build web apps, document and verify computer vision based algorithm for on-street parking lot.","start":"2021-07-01","end":"2021-09-01"},{"employer":"Ulink College Student Union","role":"Vice President","responsibilities":"Manage societies and sports events. Negotiate with the school management team to improve student experience.","start":"2017-10-01","end":"2018-06-01"}],"education":[{"degree":"M.Eng.","institution":"Imperial College London","course":"Electronic and Information Engineering","url":"https://imperial.ac.uk/study/ug/courses/electrical-engineering-department/electronic-information-meng/","start":"2019-09-28","end":"2023-06-30"},{"degree":"A Level","institution":"Ulink College of Shanghai","course":"5 A* in Further Maths, Maths, Physics, Chemistry and Biology","url":"http://www.ulink.cn/","start":"2015-08-01","end":"2019-06-01"}],"projects":[{"name":"A High Performance Digital Circuit Simulator for ISSIE","link":"[ISSIE new simulator](https://github.com/tomcl/issie/pull/291)","description":"This was my final year project during my Master's degree. ISSIE is a CAD tool designed for teaching undergraduates digital electronics design. The new simulator from this project flatten data structures used in simulation and cleaned technical debts in the original implementation. It achieves x14 speed up in simulation speed and x11 improvement in memory efficiency than the original implementation."},{"name":"Pastpaper Online","link":"Search \"pastpaper online\" in WeChat","description":"An A-level question bank I created as an individual developer, first released in 2017, had more than 20k users before sold in 2020, sold for £50k."},{"name":"MIPS Processor","link":"[0x6770/CPU-coursework](https://github.com/0x6770/CPU-coursework)","description":"A MIPS32 compatible 3-stage pipelined scalar processor written in Verilog."},{"name":"C-MIPS Compiler","link":"[0x6770/langproc-2020-cw-relipmoc](https://github.com/0x6770/langproc-2020-cw-relipmoc)","description":"A C99 to MIPS32 compiler built with C++, flex and bison."},{"name":"Circuit Simulator","link":"[0x6770/shortCircuit](https://github.com/0x6770/shortCircuit)","description":"A SPICE inspired Circuit Simulator in C++ supporting resistor, capacitor and inductor."}],"skills":["Use Linux as main operation system, familiar with tools such as git, docker, grep and sed.","Software development in C/C++, F#, JavaScript and Python.","Script in Bash, Makefile and Python.","Hardware design and verification in SystemVerilog.","Documentation in Markdown, Latex and Asciidoc, and illustration with UML and Graphviz.","Fluent English communication, PTE 80/90, IELTS 7.0/9.0."]}